To satisfy high-speed data rate requirements, integrated circuits often include differential input and output buffers that operate according to various standards. For example, current mode logic (CML) and H-bridge are commonly-used differential signaling modes. To ensure interoperability with a wide variety of devices, an integrated circuit may include both CML and H-bridge output buffers. But separate output buffers demand additional die area. Thus, hybrid output buffers have been developed that can be configured into a CML mode of operation or an H-bridge mode of operation.
But conventional hybrid output buffers suffer from high power consumption and other issues. Accordingly, there is a need in the art for improved hybrid output buffers for integrated circuits.
Embodiments of the present invention and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures.